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256bit Compiler with Intel AVX تعارف

On the screen of the upper half of the app,

a:% ymm0

b:% ymm1

c:% ymm15

c = (a + b) * (a-b) +1

And press the COMPILE! Button at the bottom.

vaddps% ymm1,% ymm0,% ymm2

vsubps% ymm1,% ymm0,% ymm3

vmulps% ymm3,% ymm2,% ymm2

movd $ 0x3F800000,% eax

movd% eax,% xmm3

vpshufd $ 0,% xmm3,% xmm3

vinsertf128 $ 1,% xmm3,% ymm3,% ymm3

vaddps% ymm3,% ymm2,% ymm15

The assembler code like is output on the lower screen. Because of AT & T notation, the operand is the opposite of Intel's official reference.

In addition, when a variable that is not defined appears in the formula, a free register is allocated without permission. So you can compile without a declaration like a:% ymm0.

Variable name: Define a variable as% register name. Although it can be specified in the range of% ymm0-% ymm15, two free registers are used internally to store temporary calculation results, so no more than 14 variables are required.

Error checking will be supported in the future.

... About AVX instructions

∙ Eight 32-bit single-precision floating point numbers can be calculated with one instruction using 16 256-bit YMM registers. It corresponds from the second generation Corei. The previous SSE instruction was a 128bit XMM register. The lower half of the YMM register can be used as an XMM register.

The big change in AVX is not only the register size but also three operands. For example, in the formula of c = a + b, if it is an AVX instruction, it can be written as vaddps a, b, c, but if it is an SSE instruction, it will be transformed to temp = a, temp = temp + b, c = temp, and movaps a , temp; addps b, temp; movaps temp, c;

... Description of used instructions

vaddps, vsubps, vmulps, vdivps ... These are vaddps a, b, c for c = a + b.

movd $ 0x3F800000,% eax ... 3F800000 is a bit pattern of floating point number 1.0f displayed in hexadecimal. % eax is a 32-bit general-purpose register.

movd% eax,% xmm3 ・ ・ ・ The floating point number is copied to the lower 32 bits of 128bit register xmm3.

vpshufd $ 0,% xmm3,% xmm3 ... The lower 32 bits are copied to the remaining 96 bits, and 1.0f is stored in 4 xmm3.

vinsertf128 $ 1,% xmm3,% ymm3,% ymm3 ... The xmm3 was copied to the upper 128 bits of 256bit register ymm3, and 8 1.0f were prepared in 256bit as a result.

... Compiling

Lexical analysis, syntax analysis, code generation, and optimization are all performed in one pass. The generated code is not debugged, so just look at the basic AVX instructions and enjoy.